sneedmca/suyu
1
0
Fork 0
mirror of https://git.suyu.dev/suyu/suyu synced 2024-11-01 21:07:52 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

shader_ir/memory: Add LD_L 128 bits loads

Browse source
This commit is contained in:
ReinUsesLisp 2019-02-03 00:35:20 -03:00
parent 9feb68085d
commit f61c1ed246
1 changed files with 19 additions and 7 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

26
src/video_core/shader/decode/memory.cpp
View file

@ -116,13 +116,25 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, const BasicBlock& code, u32 pc) {
switch (instr.ldst_sl.type.Value()) { switch (instr.ldst_sl.type.Value()) {
case Tegra::Shader::StoreType::Bits32: case Tegra::Shader::StoreType::Bits32:
SetRegister(bb, instr.gpr0, GetLmem(0)); case Tegra::Shader::StoreType::Bits64:
break; case Tegra::Shader::StoreType::Bits128: {
case Tegra::Shader::StoreType::Bits64: { const u32 count = [&]() {
SetTemporal(bb, 0, GetLmem(0)); switch (instr.ldst_sl.type.Value()) {
SetTemporal(bb, 1, GetLmem(4)); case Tegra::Shader::StoreType::Bits32:
SetRegister(bb, instr.gpr0, GetTemporal(0)); return 1;
SetRegister(bb, instr.gpr0.Value() + 1, GetTemporal(1)); case Tegra::Shader::StoreType::Bits64:
return 2;
case Tegra::Shader::StoreType::Bits128:
return 4;
default:
UNREACHABLE();
return 0;
}
}();
for (u32 i = 0; i < count; ++i)
SetTemporal(bb, i, GetLmem(i * 4));
for (u32 i = 0; i < count; ++i)
SetRegister(bb, instr.gpr0.Value() + i, GetTemporal(i));
break; break;
} }
default: default: