Daniel Lim Wee Soong
47f96fe13a
Change "yuzu starting..." to be logged with the new macro
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Just as a proof that it works
2018-03-22 18:26:43 +08:00
Daniel Lim Wee Soong
3b558eebee
Logging: Create logging macros based on fmtlib
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Add a new set of logging macros based on fmtlib
Similar but not exactly the same as https://github.com/citra-emu/citra/pull/3533
Citra currently uses a different version of fmt, which does not support FMT_VARIADIC so
make_args is used instead. On the other hand, yuzu uses fmt 4.1.0 which doesn't have make_args yet
so FMT_VARIADIC is used.
2018-03-22 18:21:29 +08:00
mailwl
95e747cd06
Service/spl: add module and services
2018-03-22 09:55:14 +03:00
bunnei
ec5ede68e7
Merge pull request #258 from Subv/gpu_attribs
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GPU: Added vertex attrib format and triangle topology registers
2018-03-21 19:36:06 -04:00
bunnei
2ab021da14
Merge pull request #260 from N00byKing/3535
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Implement Pull #3535 from citra: CMake: Set EMU_ARCH_BITS in CMakeLists.txt
2018-03-21 18:49:00 -04:00
bunnei
7fa3bf02ca
Merge pull request #259 from N00byKing/usehttps
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Use HTTPS for lz4
2018-03-21 18:48:39 -04:00
N00byKing
34b733e70e
CMake: Set EMU_ARCH_BITS in CMakeLists.txt
2018-03-21 19:03:20 +01:00
N00byKing
3cdf6c536d
Use HTTPS for Submodule lz4
2018-03-21 19:01:54 +01:00
Subv
eff3f60b73
FS: Implemented IFileSystem::CreateDirectory.
2018-03-21 09:55:59 -05:00
bunnei
4721ea4523
Merge pull request #257 from mailwl/vi-module
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Service/vi: convert services to module
2018-03-21 10:48:15 -04:00
Subv
c450d264eb
GPU: Added vertex attribute format registers.
2018-03-21 09:26:47 -05:00
mailwl
6673ed1274
Service/vi: convert services to module
2018-03-21 13:09:40 +03:00
Subv
ae28a52277
GPU: Added registers for the number of vertices to render.
2018-03-20 23:28:06 -05:00
bunnei
0b3ab30762
Merge pull request #254 from bunnei/port-citra-renderer
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Port Citra OpenGL rasterizer code
2018-03-20 21:37:43 -04:00
bunnei
8c8de2efe9
Merge pull request #256 from mailwl/fatal
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Service: add fatal:u, fatal:p services
2018-03-20 11:12:39 -04:00
mailwl
dca7cfb9cf
Service: add fatal:u, fatal:p services
2018-03-20 16:59:02 +03:00
bunnei
6e3222363c
renderer_gl: Port boilerplate rasterizer code over from Citra.
2018-03-20 00:07:32 -04:00
bunnei
9c468e0c55
gl_shader_util: Sync latest version with Citra.
2018-03-20 00:07:31 -04:00
bunnei
d7b1ebe4a8
renderer_gl: Port over gl_shader_gen module from Citra.
2018-03-20 00:07:30 -04:00
Subv
0485ee499f
FS: Implemented IFileSystem's OpenDirectory function.
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Note that the filter parameter is not yet implemented.
2018-03-19 23:02:30 -05:00
Subv
21bac2d7d7
FS: Added the IDirectory IPC interface and implemented its two functions.
2018-03-19 23:01:47 -05:00
Subv
6d90d99d12
FS: Implement DiskFileSystem's OpenDirectory interface.
2018-03-19 23:00:37 -05:00
Subv
e1d7b9fc2c
FS: Implement DiskFileSystem::GetEntryType for existing files/directories.
2018-03-19 22:59:38 -05:00
Subv
a9ba2c2000
FS: Updated the Directory Entry structure to match the Switch.
2018-03-19 22:58:55 -05:00
Subv
fc44261dd1
FS: Support the file Append open mode.
2018-03-19 22:57:34 -05:00
Mat M
f4700ccabf
Merge pull request #253 from Subv/rt_depth
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GPU: Added registers for color and Z buffers.
2018-03-19 23:37:47 -04:00
bunnei
4bdb46e4c2
renderer_gl: Port over gl_shader_decompiler module from Citra.
2018-03-19 23:14:03 -04:00
bunnei
a3e10b1a72
renderer_gl: Port over gl_rasterizer_cache module from Citra.
2018-03-19 23:14:03 -04:00
bunnei
db0cfb8e8b
gl_resource_manager: Sync latest version with Citra.
2018-03-19 23:14:02 -04:00
bunnei
0e4b9cdde4
renderer_gl: Port over gl_stream_buffer module from Citra.
2018-03-19 23:14:02 -04:00
bunnei
a1cf5020e6
externals: Update Glad to latest version used by Citra.
2018-03-19 23:14:01 -04:00
bunnei
6a0902e56d
gl_state: Sync latest version with Citra.
2018-03-19 23:13:49 -04:00
Subv
808704c78c
FS: Implement MountSdCard.
2018-03-19 21:21:49 -05:00
Subv
c4ca802b9d
FS: Added an SDMC archive factory and registered it to the SDMC archive on startup.
2018-03-19 21:17:15 -05:00
Subv
7a27a11770
GPU: Added Z buffer registers to Maxwell3D's reg structure.
2018-03-19 16:55:33 -05:00
Subv
21d9519032
GPU: Added the render target (RT) registers to Maxwell3D's reg structure.
2018-03-19 16:46:29 -05:00
bunnei
a90ab1dec7
Merge pull request #252 from N00byKing/3064
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Implement Pull #3064 from citra: Clean all format warnings (Yuzu-specific format warnings cleared too)
2018-03-19 16:29:03 -04:00
N00byKing
1d8b6ad13b
Clang Fixes
2018-03-19 17:53:35 +01:00
N00byKing
d16e08454d
oops
2018-03-19 17:43:04 +01:00
N00byKing
0e72d0d826
More Warning cleanups
2018-03-19 17:27:04 +01:00
N00byKing
ef875d6a35
Clean Warnings (?)
2018-03-19 17:07:08 +01:00
bunnei
b2d7c92cae
Merge pull request #251 from Subv/tic_tsc
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GPU: Added TIC and TSC registers to the Maxwell3D register structure.
2018-03-19 10:33:21 -04:00
Subv
dcae0c9a4f
GPU: Added the TSC registers to the Maxwell3D register structure.
2018-03-19 00:36:25 -05:00
Subv
cff7b29bba
GPU: Added the TIC registers to the Maxwell3D register structure.
2018-03-19 00:32:57 -05:00
bunnei
23a0d2d7b7
Merge pull request #193 from N00byKing/3184_2_robotic_boogaloo
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Implement Pull #3184 from citra: core/arm: Improve timing accuracy before service calls in JIT (Rebased)
2018-03-18 22:35:47 -04:00
bunnei
2dc3a56e96
Merge pull request #250 from bunnei/buffer-dequeue-wait
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vi: TransactParcel DequeueBuffer should wait current thread
2018-03-18 22:25:09 -04:00
bunnei
2332a44b68
Merge pull request #249 from Subv/macro_E1A
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GPU: Implement macro 0xE1A BindTextureInfoBuffer in HLE.
2018-03-18 21:04:29 -04:00
bunnei
c1c92c30f9
vi: Remove DequeueBuffer and wait until next available buffer.
2018-03-18 20:56:35 -04:00
bunnei
c86af6939c
hle_ipc: Add SleepClientThread to block current thread within HLE routines.
2018-03-18 20:56:34 -04:00
bunnei
2faa83ca13
hle_ipc: Use shared_ptr instead of unique_ptr to allow copies.
2018-03-18 20:56:33 -04:00
