MerryMage
88c9608eac
arm_dynarmic: Fix timing
2018-03-24 09:02:19 +00:00
N00byKing
ef875d6a35
Clean Warnings (?)
2018-03-19 17:07:08 +01:00
bunnei
23a0d2d7b7
Merge pull request #193 from N00byKing/3184_2_robotic_boogaloo
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Implement Pull #3184 from citra: core/arm: Improve timing accuracy before service calls in JIT (Rebased)
2018-03-18 22:35:47 -04:00
bunnei
403f8e79ea
arm_interface: Support unmapping previously mapped memory.
2018-03-16 18:32:24 -04:00
bunnei
7d6653268f
core: Move process creation out of global state.
2018-03-14 18:42:19 -04:00
N00byKing
bc88cae0c7
Implements citra-emu/citra#3184
2018-02-25 11:44:21 +01:00
bunnei
c45173c9a6
Merge pull request #212 from mailwl/stubs
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Stub some functions
2018-02-23 21:09:56 -08:00
mailwl
910198a29a
Stub am::SetScreenShotPermission, and bsd::StartMonitoring functions
2018-02-22 13:04:23 +03:00
MerryMage
32d127ad3e
dynarmic: Update to 6b4c6b0
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6b4c6b0 impl: Update PC when raising exception
7a1313a A64: Implement FDIV (vector)
b2d781d system: Raise exception for YIELD, WFE, WFI, SEV, SEVL
b277bf5 Correct FPSR and FPCR
7673933 A64: Implement USHL
8d0e558 A64: Implement UCVTF (vector, integer), scalar variant
da9a4f8 A64: Partially implement FCVTZU (scalar, fixed-point) and FCVTZS (scalar, fixed-point)
7479684 A64: Implement system register TPIDR_EL0
0fd75fd A64: Implement system registers FPCR and FPSR
31e370c A64: Implement system register CNTPCT_EL0
9a88fd3 A64: Implement system register CTR_EL0
1d16896 A64: Implement NEG (vector)
3184edf IR: Add IR instruction ZeroVector
31f8fbc emit_x64_floating_point: Add maybe_unused to preprocess parameter
567eb1a A64: Implement FMINNM (scalar)
c6d8fa1 A64: Implement FMAXNM (scalar)
616056d constant_pool: Add frame parameter
a3747cb A64: Implement ADDP (scalar)
5cd5d9f reg_alloc: Only exchange GPRs
dd0452a A64: Implement DUP (element), scalar variant
e5732ea emit_x64_floating_point: Correct FP{Max,Min}{32,64} implementations for -0/+0
40eb9c3 A64: Implement FMAX (scalar), FMIN (scalar)
7cef39b fuzz_with_unicorn: QEMU's implementation of FCVT is incorrect
826dce2 travis: Switch unicorn repository
9605f28 a64/config: Allow NaN emulation accuracy to be set
e9435bc a64_emit_x64: Add conf to A64EmitContext
30b596d fuzz_with_unicorn: Explicitly test floating point instructions
be292a8 A64: Implement FSQRT (scalar)
3c42d48 backend_x64: Accurately handle NaNs
4aefed0 fuzz_with_unicorn: Print AArch64 disassembly
2018-02-21 21:39:07 +00:00
MerryMage
e8b9731af3
arm_dynarmic: LOG_INFO on unicorn fallback
2018-02-21 21:39:07 +00:00
MerryMage
6085d32cf5
arm_dynarmic: Support direct page table access
2018-02-12 21:53:32 +00:00
MerryMage
d3bbed5e78
dynarmic: Update to 41ae12263
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Changes: Primarily implementing more A64 instructions
2018-02-09 00:29:36 +00:00
River City Ransomware
dd62f125c3
Fixes some cast warnings, partial port of citra #3064 ( #106 )
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* Fixes some cast warnings, partially fixes citra #3064
* Converted casts to uint32_t to u32
* Ran clang-format
2018-01-19 18:01:41 -05:00
MerryMage
e35644c005
clang-format
2018-01-16 18:05:21 +00:00
James Rowe
2d7a85f7af
Build: Automagically handle unicorn
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On MSVC if unicorn isn't found, fallback to bundled unicorn
On everything else, fallback to building unicorn in externals
Also fixes loading unicorn in msvc
2018-01-16 09:39:07 -07:00
James Rowe
e026b66bbb
Build: Add unicorn as a submodule and build it if needed
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Adds a cmake custom target that will build unicorn on first compile and
uses this in the build scripts as well. Updates Appveyor and Travis
build scripts to work with the new unicorn build, and updates the paths
to all of the different artifacts.
2018-01-16 01:15:52 -07:00
MerryMage
668e5452fa
Update dynarmic to bc73004
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bc73004 a64_merge_interpret_blocks: Remove debug output
4e656ed tests/A64: Randomize PSTATE.<NZCV>
fd9530b A64: Optimization: Merge interpret blocks
3c9eb04 testenv: Use format constants
324f3fc tests/A64: Unicorn interface fixes
98ecbe7 tests/A64: Fuzz against unicorn
b1d38e7 tests/A64: Move TestEnvironment to own header
5218ad9 A64/data_processing_pcrel: bug: ADR{,P} instructions sign extend their immediate
b1a8c39 A64/data_processing_addsub: bug: {ADD,SUB}S (extended register) instructions write to ZR when d = 31
64827fb a64_emit_x64: bug: A64CallSupervisor trampled callee-save registers
1bfa04d emit_x64: bug: OP m/r64, imm32 form instructions sign-extend their immediate on x64
edadeea A64 inferface: Use two argument static_assert
9ab1304 A64: Add ExceptionRaised IR instruction
6843eed Update readme
7438d07 A64/translate: Add TranslateSingleInstruction function
2018-01-13 22:38:57 +00:00
bunnei
17af2937fe
arm_unicorn: Log unmapped memory access address.
2018-01-13 16:24:05 -05:00
bunnei
1247c53786
yuzu: Update license text to be consistent across project.
2018-01-13 16:22:39 -05:00
MerryMage
d2fbc78320
arm_dynarmic: Implement core
2018-01-12 17:48:29 -05:00
bunnei
b38223f662
arm_unicorn: Load/release unicorn DLL.
2018-01-04 13:40:01 -05:00
bunnei
3f8b9181b5
unicorn: Use for arm interface on Windows.
2018-01-04 00:13:23 -05:00
bunnei
6e9d66fd3a
arm_dynarmic: More cleanup.
2018-01-04 00:09:12 -05:00
bunnei
aa7e061e71
arm_dynarmic: Gut interface until dynarmic is ready for general use.
2018-01-03 22:10:11 -05:00
bunnei
b172f0d770
arm: Remove SkyEye/Dyncom code that is ARMv6-only.
2018-01-02 22:24:12 -05:00
bunnei
45db4bb3ea
logging: Rename category "Core_ARM11" to "Core_ARM".
2017-10-23 00:13:12 -04:00
bunnei
b1d5db1cf6
Merge remote-tracking branch 'upstream/master' into nx
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# Conflicts:
# src/core/CMakeLists.txt
# src/core/arm/dynarmic/arm_dynarmic.cpp
# src/core/arm/dyncom/arm_dyncom.cpp
# src/core/hle/kernel/process.cpp
# src/core/hle/kernel/thread.cpp
# src/core/hle/kernel/thread.h
# src/core/hle/kernel/vm_manager.cpp
# src/core/loader/3dsx.cpp
# src/core/loader/elf.cpp
# src/core/loader/ncch.cpp
# src/core/memory.cpp
# src/core/memory.h
# src/core/memory_setup.h
2017-10-09 23:56:20 -04:00
bunnei
6377585edb
arm_interface: Set TLS address for dynarmic core.
2017-09-30 14:34:03 -04:00
bunnei
3411883fe3
arm: Use 64-bit addressing in a bunch of places.
2017-09-30 14:28:53 -04:00
Huw Pascoe
529f4a0131
Moved down_count to CoreTiming
2017-09-30 17:38:14 +01:00
MerryMage
67a70bd9e1
ARM_Interface: Implement PageTableChanged
2017-09-24 23:08:25 +01:00
B3n30
813837c5cf
Merge pull request #2842 from Subv/switchable_page_table
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Kernel/Memory: Give each process its own page table and allow switching the current page table upon reschedule
2017-09-15 22:41:45 +02:00
Subv
7a3ab7c63d
CPU/Dynarmic: Disable the fast page-table access in dynarmic until it supports switching page tables at runtime.
2017-09-15 14:26:22 -05:00
Subv
d237a89048
CPU/Dynarmic: Fixed a warning when incrementing the number of ticks in ExecuteInstructions.
2017-08-21 08:34:25 -05:00
Subv
9d0841b48b
Dyncom: Use size_t instead of int to store the instruction offsets in the instruction cache.
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Fixes a few warnings.
2017-08-21 08:34:23 -05:00
Subv
d3fb1d6c38
Dyncom: Fixed a conversion warning when decoding thumb instructions.
2017-08-21 08:20:36 -05:00
Sebastian Valle
c291db72e7
Merge pull request #2692 from Subv/vfp_ftz
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Dyncom/VFP: Convert denormal outputs into 0 when the FTZ flag is enabled.
2017-05-22 12:16:53 -05:00
Subv
5b46a89230
fixup! Dyncom/VFP: Convert denormal outputs into 0 when the FTZ flag is enabled.
2017-05-21 18:56:09 -05:00
Merry
188d63fdb6
Merge pull request #2694 from Subv/vfp_vsub_ftz
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Dyncom/VFP: Perform flush-to-zero on the second operand of vsub before sending it to vadd.
2017-05-22 00:50:52 +01:00
Subv
a0874a7a68
Dyncom/VFP: Perform flush-to-zero on the second operand of vsub before sending it to vadd.
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Previously we were letting vadd flush the value to positive 0, but there are cases where this behavior is wrong, for example,
vsub: -0 - +0 = -0
vadd: -0 + +0 = +0
Now we'll flush the value to +0 inside vsub, and then negate it.
2017-05-13 18:03:41 -05:00
Yuri Kunde Schlesner
13dd0b88de
Merge pull request #2696 from Subv/vfp_revert
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Dyncom/VFP: Revert edf30d8
2017-05-08 21:38:45 -07:00
Subv
11fe85f129
Dyncom/VFP: Strip the VFP_NAN_FLAG sentinel value when setting vfp exceptions.
2017-05-09 00:36:23 -05:00
Subv
bf45ccfb40
Revert "Remove exceptions parameter from normaliseround VFP functions"
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This reverts commit edf30d84cc
2017-05-09 00:36:22 -05:00
Subv
b1a29371c9
Dyncom/VFP: Convert denormal outputs into 0 when the FTZ flag is enabled.
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Inputs are still not flushed to 0 if they are denormals.
2017-05-08 14:34:16 -05:00
Yuri Kunde Schlesner
d97b977540
Dyncom: Remove disassembler code
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Had licensing issue around it, in addition to several bugs.
Closes #1632 , #1280
2017-05-07 15:33:46 -07:00
Yuri Kunde Schlesner
f0a582b218
Dyncom: Tweak types and log formatting
2017-05-07 15:33:42 -07:00
Yuri Kunde Schlesner
cb4da3975e
Remove unused symbols code
2017-05-07 15:33:39 -07:00
MerryMage
b125388152
dyncom: Correct SXTAB16 and SXTB16
2017-02-18 20:04:54 +00:00
MerryMage
e2815408fd
arm_dynarmic: Update memory interface
2017-02-03 17:32:51 +00:00
MerryMage
2b36d4c9d7
arm_dynarmic: CP15 support
2017-02-03 17:32:47 +00:00
bunnei
76890672a0
Merge pull request #2366 from MerryMage/MemoryReadCode
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arm_dynarmic: Provide MemoryReadCode callback
2016-12-22 14:25:15 -05:00
MerryMage
f8cf87ce34
arm_dynarmic: Provide MemoryReadCode callback
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Change of interface in dynarmic 36082087ded632079b16d24137fdd0c450ce82ea
2016-12-22 16:07:14 +00:00
bunnei
8b1e269e58
ThreadContext: Move from "core" to "arm_interface".
2016-12-22 00:27:49 -05:00
Lioncash
ba20dd9b61
gdbstub: Remove global variable from public interface
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Currently, this is only ever queried, so adding a function to check if the
server is enabled is more sensible.
If directly modifying this externally is ever desirable, it should be done
by adding a function to the interface, rather than exposing implementation
details directly.
2016-12-15 16:37:22 -05:00
Lioncash
2f3c1bdfb4
core: Add missing #pragma once directives where applicable
2016-12-15 15:40:51 -05:00
Emmanuel Gil Peyrot
643e590b5c
Core: Add a forgotten #include <cstring> for memcpy.
2016-12-11 01:20:45 +00:00
MerryMage
27be446049
dynarmic: Add ticks based on ticks executed, not ticks requested
2016-11-26 20:32:33 +00:00
James Rowe
bbe57a66ca
Expose page table to dynarmic for optimized reads and writes to the JIT
2016-11-24 20:41:18 -07:00
Yuri Kunde Schlesner
84fbbe2629
Use negative priorities to avoid special-casing the self-include
2016-09-21 00:15:56 -07:00
Emmanuel Gil Peyrot
ebdae19fd2
Remove empty newlines in #include blocks.
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This makes clang-format useful on those.
Also add a bunch of forgotten transitive includes, which otherwise
prevented compilation.
2016-09-21 11:15:47 +09:00
Yuri Kunde Schlesner
396a8d91a4
Manually tweak source formatting and then re-run clang-format
2016-09-18 21:14:25 -07:00
Emmanuel Gil Peyrot
dc8479928c
Sources: Run clang-format on everything.
2016-09-18 09:38:01 +09:00
Emmanuel Gil Peyrot
bfc454e951
Dyncom: Disable clang-format on the decoding table.
2016-09-18 09:36:57 +09:00
bunnei
1b95f61d82
arm_dynarmic: Implement GetVFPSystemReg/SetVFPSystemReg.
2016-09-15 17:58:06 -04:00
bunnei
05e120a4cc
arm: ResetContext shouldn't be part of ARM_Interface.
2016-09-15 17:49:30 -04:00
bunnei
85861d44b7
arm_dynarmic/arm_dyncom: Remove unnecessary "virtual" keyword.
2016-09-15 17:49:30 -04:00
bunnei
b7aef81cb4
dyncom: Use VFP_FPSCR/VFP_FPEXC.
2016-09-15 17:49:29 -04:00
bunnei
1976a2d773
dynarmic: Implement ARM CPU interface.
2016-09-15 17:49:26 -04:00
wwylele
2161f52661
ARM: add ClearInstructionCache function
2016-08-27 21:38:06 +08:00
MerryMage
15b2eec4bd
dyncom: Read-after-write in SMLA
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In the case when RD === RN, RD was updated before AddOverflow was called
to check for an overflow, resulting in an incorrect state of the Q flag.
2016-08-22 15:13:33 +01:00
MerryMage
50407a8dc8
Dyncom: Correct implementation of STM for R15
2016-08-14 00:49:34 +01:00
MerryMage
60c93ca3b5
dyncom: Fix translation of thumb REVSH
2016-07-28 11:51:29 +01:00
archshift
ca20b1f87d
Make arm_dyncom_trans* into a fully fledged compilation unit
2016-06-12 01:54:45 -07:00
archshift
54b5178f6c
arm_dyncom_interpreter: slightly change AllocBuffer to be intuitive
2016-06-12 00:31:52 -07:00
archshift
765eef3319
arm_dyncom_interpreter: Add specialized GetAddressingOpLoadStoreT func
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This allows us to get the addressing operation for STRT, LDRT, STRBT,
and LDRBT. We do this so that translation functions don't need to
see the addressing ops directly.
2016-06-10 18:45:48 -07:00
archshift
eac4c016cb
arm_dyncom_interpreter: rename operation functions to fit style guide
2016-06-10 18:42:08 -07:00
archshift
5297f5dfc9
arm_dyncom_interpreter: Rename anonymous enum to TransExtData
2016-06-10 18:35:57 -07:00
archshift
2c482722e7
arm_dyncom_interpreter.cpp: #include translation info from inc files
2016-06-10 18:25:30 -07:00
Mat M
031a9c57bb
Merge pull request #1568 from JayFoxRox/fix-printf
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Fix ftoi and disable VFPv3
2016-05-26 19:03:00 -04:00
Jannik Vogel
edf30d84cc
Remove exceptions parameter from normaliseround VFP functions
2016-05-18 16:28:13 +02:00
Jannik Vogel
693cca8f1f
Fix exception propagation for VFP single precision
2016-05-18 15:24:42 +02:00
Jannik Vogel
7dde13f875
Fix exception propagation for VFP double precision
2016-05-18 15:24:42 +02:00
Jannik Vogel
3a45eacb16
Fix read-after-write in SMUAD, SMLAD, SMUSD, SMLSD
2016-05-18 14:03:02 +02:00
Jannik Vogel
af37dd0d52
Set fpscr for new threads
2016-05-17 08:59:52 +02:00
Jannik Vogel
501d0bc5ed
Fix ftoi behaviour
2016-05-16 15:00:45 +02:00
Jannik Vogel
6fe0cb671d
Respect fpscr in ftoiz
2016-05-16 15:00:45 +02:00
Jannik Vogel
1643786c04
Disable VFP3 instructions
2016-05-16 15:00:45 +02:00
Lioncash
0f941d0245
dyncom: Reset the context into user mode correctly
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The other mode was system mode.
2016-05-09 16:30:55 -04:00
Yuri Kunde Schlesner
e3a8292495
Common: Remove section measurement from profiler ( #1731 )
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This has been entirely superseded by MicroProfile. The rest of the code
can go when a simpler frametime/FPS meter is added to the GUI.
2016-04-29 00:07:10 -07:00
mailwl
2efc1c9348
Fix BLX LR opcode interpretation
2016-04-09 19:11:02 +03:00
mailwl
4630209c4c
Update cpsr (T)humb bit while creating thread
2016-04-08 18:41:09 +03:00
mailwl
06a4369f75
Fix thumb ADR instruction alignment
2016-04-06 19:46:58 +03:00
Mathew Maidment
aa6380e5bc
Merge pull request #1643 from MerryMage/make_unique
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Common: Remove Common::make_unique, use std::make_unique
2016-04-05 20:10:11 -04:00
MerryMage
a06dcfeb61
Common: Remove Common::make_unique, use std::make_unique
2016-04-05 13:31:17 +01:00
Mathew Maidment
80c16961ae
Merge pull request #1618 from MerryMage/one-step
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Prevent cache overflow when single stepping
2016-03-31 11:00:42 -04:00
MerryMage
cbba0bec7c
DynCom: Optimize single stepping
2016-03-30 18:57:59 +01:00
Lioncash
d53c9cde1a
armstate: Correct FIQ register banking
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FIQ has seven banked registers (R8 to R14), not two.
2016-03-21 18:56:27 -04:00
rob turner
d29578d467
ARM_Disasm::DisassembleMemHalf: actually use width in determining opcode name
2016-01-19 18:42:16 +01:00
Lioncash
532dc797c9
arm_dyncom_dec: Fix decoding of VMLS
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Previously, all VMLS variants would misdecode as CDP
(which isn't necessarily wrong in itself, however
VMLS has it's own label of execution)
2015-12-30 14:23:07 -05:00
Lioncash
fddfe946c8
dyncom: Handle modifying the APSR via an MRC instruction
2015-12-28 07:52:04 -05:00
Lioncash
d09b7a3c12
dyncom: Remove PC dispatch from several instructions
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These instructions aren't capable of using the PC as a destination
2015-12-20 21:19:02 -05:00
Lioncash
5a531d7ec2
dyncom: Handle unprivileged load/store variants correctly
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LDRT/LDRBT/STRBT/STRT should simulate the load or store
as if the host CPU is in user mode.
STRT is also allowed to use the PC as an operand
2015-12-19 19:05:50 -05:00
Lioncash
56e22e6aac
dyncom: Remove static keyword from header functions
2015-12-06 15:14:51 -05:00
Lioncash
1ea0702eaa
arm_interface: Make GetNumInstructions const
2015-12-06 15:07:59 -05:00
Lioncash
de9a625c7e
arm_interface: directly initialize class members
2015-12-06 15:07:00 -05:00
Lioncash
d03e7f08ff
dyncom: const correctness changes
2015-12-06 15:03:06 -05:00
Lioncash
5e2b66d2a4
armstate: Zero out the registers on creation
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std::array isn't always guaranteed to explicitly zero out it's contents
without an initializer list.
2015-11-29 15:16:34 -05:00
bunnei
43bb29edc5
Merge pull request #1122 from polaris-/gdbstub
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gdbstub implementation
2015-11-11 23:21:31 -05:00
polaris-
2b7316a379
Remove unnecessary new lines, changed Deinit to Shutdown
2015-10-11 20:07:58 -04:00
Emmanuel Gil Peyrot
14af5919ba
CitraQt, SkyEye, Loader, VideoCore: Remove newlines in LOG_* calls.
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The LOG_* function itself already appends one.
2015-10-09 22:14:56 +01:00
polaris-
42928659e8
Use BreakpointAddress struct instead of passing address directly
2015-10-04 11:22:31 -04:00
polaris-
31dee93e84
Implement gdbstub
2015-10-04 11:16:59 -04:00
Lioncash
751fbfdcc3
general: Silence some warnings when using clang
2015-09-16 08:51:53 -04:00
Lioncash
60b3fc01a2
General: Replace NULL and '0' usages with nullptr where applicable
2015-09-11 14:59:49 -04:00
archshift
9e8383e296
DynCom: Converted all 0xE condition code checks to ConditionCode::AL
2015-09-05 22:24:42 -07:00
Lioncash
dc1b024b80
dyncom: Simplify some comparisons in CondPassed
2015-08-26 00:10:23 -04:00
Lioncash
01dd833ffa
dyncom: Change return type of CondPassed to bool
2015-08-25 23:59:01 -04:00
Yuri Kunde Schlesner
0fcabd2b11
Integrate the MicroProfile profiling library
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This brings goodies such as a configurable user interface and
multi-threaded timeline view.
2015-08-24 22:16:28 -03:00
Yuri Kunde Schlesner
3efb205a68
Merge pull request #1025 from yuriks/heap-management
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Kernel: Correct(er) handling of Heap and Linear Heap allocations
2015-08-22 14:01:57 -07:00
Yuri Kunde Schlesner
e2c7954be5
Memory: Move address type conversion routines to memory.cpp/h
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These helpers aren't really part of the kernel, and mem_map.cpp/h is
going to be moved there next.
2015-08-16 01:03:46 -03:00
Lioncash
46b0277cbf
vfp: use std::swap where applicable
2015-08-15 19:08:51 -04:00
bunnei
cebf245504
Merge pull request #1027 from lioncash/debugger
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debugger: Add the ability to view VFP register contents
2015-08-13 18:13:25 -04:00
Emmanuel Gil Peyrot
5115d0177e
ARM Core, Video Core, CitraQt, Citrace: Use CommonTypes types instead of the standard u?int*_t types.
2015-08-11 22:38:44 +01:00
aroulin
38c87733d9
arm_disasm: ARMv6 mul/div and abs media instructions
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SMLAD, SMUAD, SMLSD, SMUSD, SMLALD, SMLSLD,
SMMLA, SMMUL, SMMLS
USAD8, USADA8
2015-08-11 12:48:28 +02:00
aroulin
4a1db13072
arm_disasm: ARMv6 parallel add/sub media instructions
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{S, U, Q, UQ, SH, UH}{ADD16, ASX, SAX, SUB16, ADD8, SUB8}
2015-08-11 12:48:23 +02:00
aroulin
0be8e1bfb6
arm_disasm: ARMv6 reversal media instructions
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REV, REV16, REVSH
Only their ARM encoding, Thumb encoding is still missing.
2015-08-09 13:52:51 +02:00
aroulin
e4ff244288
arm_disasm: ARMv6 saturation media instructions
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SSAT, SSAT16, USAT, USAT16
2015-08-09 01:31:10 +02:00
aroulin
47657a1817
arm_disasm: ARMv6 packing and sign-extend media instructions
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PKH, SEL
SXTAB, SXTAB16, SXTB, SXTB16, SXTH, SXTAH
UXTAB, UXTAB16, UXTB, UXTB16, UXTH, UXTAH
2015-08-09 01:31:03 +02:00
Lioncash
f48a89af8b
Merge pull request #1026 from lioncash/disasm
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arm_disasm: Remove unnecessary code
2015-08-07 07:29:27 -04:00
Lioncash
3b457a5876
arm_interface: Implement interface for retrieving VFP registers
2015-08-06 21:24:25 -04:00
Lioncash
59d5358068
arm_disasm: Remove unnecessary code
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This part of disassembly only determines the opcode, there's no need for offset calculation here.
2015-08-06 19:55:41 -04:00
aroulin
3425cfe54a
Disassembler: ARMv6K REX instructions
2015-08-06 15:50:54 +02:00
aroulin
5d81a2fd48
Disassembler: ARMv6K hint instructions
2015-08-06 15:25:08 +02:00
bunnei
ce65925bc3
Merge pull request #1008 from lioncash/pc
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dyncom: Handle the case where PC is the source register for STR/VSTM/VLDM
2015-07-30 10:44:50 -04:00
Lioncash
46663d657f
dyncom: Remove an unused variable
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This was used prior to InterpreterTranslate existing.
2015-07-29 12:21:16 -04:00
Lioncash
2e420aba3c
dyncom: Handle the case where PC is the source register for STR/VSTM/VLDM
2015-07-29 10:57:47 -04:00
Lioncash
2182adff9e
dyncom: Handle left-operand PC correctly for data-processing ops
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This is considered deprecated in the ARM manual (using PC as an operand),
however, this is still able to be executed on the MPCore (which I'm quite
sure would be rare to begin with).
2015-07-28 20:14:08 -04:00
Lioncash
9be4ef3879
dyncom: Remove an unnecessary typedef
2015-07-28 03:41:25 -04:00
Lioncash
89540ea761
dyncom: Use enum class for instruction decoding results
2015-07-28 02:27:57 -04:00
Lioncash
7e4fb4db19
dyncom: Remove code duplication regarding thumb instructions
2015-07-27 22:22:00 -04:00
Lioncash
a507ea23c1
dyncom: Migrate exclusive memory access control into armstate
2015-07-27 22:06:59 -04:00
Lioncash
db4e99c186
dyncom: Remove duplicated typedef and extern
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These are already present in arm_dyncom_dec.h.
2015-07-27 22:06:51 -04:00
Lioncash
816b1ca776
dyncom: Use std::array for register arrays
2015-07-26 13:21:04 -04:00
Lioncash
0ecc6e2f04
dyncom: Use ARMul_State as an object
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Gets rid of C-like parameter passing.
2015-07-26 13:18:32 -04:00
Lioncash
03213f893e
dyncom: Remove unnecessary initialization code.
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Targeting ARM version variants was only a thing on armemu.
The reset routine also does basically the same thing as NewState.
2015-07-25 22:10:54 -04:00
Lioncash
3257d797e1
dyncom: Remove unnecessary abort-related cruft
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Both the MPCore and the ARM9 have the same data abort model (base restored), so differentiating isn't necessary.
2015-07-25 22:10:53 -04:00
Lioncash
dfb424b6d1
dyncom: Rename armdefs.h to armstate.h
2015-07-25 22:10:44 -04:00
Lioncash
4bb1a5ca47
dyncom: Get rid of skyeye typedefs
2015-07-25 20:52:10 -04:00
Lioncash
0191c26521
dyncom: Move helper functions to their own header
2015-07-25 20:35:18 -04:00
Lioncash
6b73e4566b
dyncom: Move arminit.cpp and armsupp.cpp into skyeye_common
2015-07-25 20:01:44 -04:00
