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https://git.suyu.dev/suyu/suyu
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0bb85f6a75
Mostly fixing unused *, implicit conversion, braced scalar init, fpermissive, and some others. Some Clang errors likely remain in video_core, and std::ranges is still a pertinent issue in shader_recompiler shader_recompiler: cmake: Force bracket depth to 1024 on Clang Increases the maximum fold expression depth thread_worker: Include condition_variable Don't use list initializers in control flow Co-authored-by: ReinUsesLisp <reinuseslisp@airmail.cc>
45 lines
1.3 KiB
C++
45 lines
1.3 KiB
C++
// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/common_types.h"
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#include "shader_recompiler/exception.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/common_encoding.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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namespace Shader::Maxwell {
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namespace {
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void DMUL(TranslatorVisitor& v, u64 insn, const IR::F64& src_b) {
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union {
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u64 raw;
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BitField<0, 8, IR::Reg> dest_reg;
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BitField<8, 8, IR::Reg> src_a_reg;
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BitField<39, 2, FpRounding> fp_rounding;
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BitField<48, 1, u64> neg;
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} const dmul{insn};
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const IR::F64 src_a{v.ir.FPAbsNeg(v.D(dmul.src_a_reg), false, dmul.neg != 0)};
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const IR::FpControl control{
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.no_contraction = true,
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.rounding = CastFpRounding(dmul.fp_rounding),
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.fmz_mode = IR::FmzMode::None,
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};
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v.D(dmul.dest_reg, v.ir.FPMul(src_a, src_b, control));
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}
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} // Anonymous namespace
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void TranslatorVisitor::DMUL_reg(u64 insn) {
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DMUL(*this, insn, GetDoubleReg20(insn));
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}
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void TranslatorVisitor::DMUL_cbuf(u64 insn) {
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DMUL(*this, insn, GetDoubleCbuf(insn));
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}
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void TranslatorVisitor::DMUL_imm(u64 insn) {
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DMUL(*this, insn, GetDoubleImm20(insn));
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}
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} // namespace Shader::Maxwell
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